In computer systems, there is a type of asynchronous signaling technique known as an interrupt. While the occurrence of each interrupt is asynchronous, the handling of interrupts can be managed cyclically or non-cyclically. When interrupts occur in peripheral equipment of a computer system, an interrupt controller receives the interrupts and stores them at an internal register and then sends an interrupt request (IRQ) to the CPU in accordance with a priority among the interrupt sources. The CPU receiving the IRQ carries out an appropriate service routine depending on the interrupt source.
The computer system should include information about the various interrupt sources and should provide the operating system (or operating program) with such information. Such information about the interrupt sources is used by the interrupt controller to handle the interrupts. The interrupt controller loads such information in the form of an interrupt source table. Where interrupt sources are polled by the interrupt controller, a count is incremented as the next interrupt source is polled. The internal register that stores the interrupts can be organized according to the count value. When the interrupt controller generates an IRQ, it determines the appropriate service routine for the interrupt that is to be serviced by indexing into the source table using the count value.
However, reading the source table into volatile memory and indexing into the source table represents a load on the CPU. As a result, such loading is a significant factor in performance degradation of the computer system.